华中科技大学主页平台管理系统 ZHENG LONG--英文主页-- Yu Huang, Long Zheng*, Pengcheng Yao, Qinggang Wang, Haifeng Liu, Xiaofei Liao, Hai Jin, and Jingling Xue, Ready: A reram-based processing-in-memory accelerator for dynamic graph convolutional networ

郑龙 Professor

郑龙，华中科技大学计算机科学与技术学院副教授，博士生导师，国家优秀青年科学基金获得者，湖北省杰出青年基金获得者，“英特尔中国学术英才计划”荣誉学者。2016年获得华中科技大学计算机系统结构专业工学博士学位，2014-2015年在新加坡南洋理工大学并行与分布式计算中心交流访问，目前主要从事新型计算机体系结构、图计算、近数据处理、运行时系统等方向的研究，在MICRO、ISCA、HPCA、SC、DAC、USENIX ATC、FPGA、ICDE、PACT...Detials

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Paper Publications Current position: 英文主页 > Scientific Research > Paper Publications

Yu Huang, Long Zheng*, Pengcheng Yao, Qinggang Wang, Haifeng Liu, Xiaofei Liao, Hai Jin, and Jingling Xue, Ready: A reram-based processing-in-memory accelerator for dynamic graph convolutional networ

Release time:2022-09-02 Hits:

Journal:s, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 3567-3578 (2022)

Pre One: Long Zheng, Haifeng Liu, Yu Huang, Dan Chen, Chaoqiang Liu, Haiheng He, Xiaofei Liao, Hai Jin, and Jingling Xue, A flexible yet eﬀicient dnn pruning approach for crossbar-based processing-in-memory architectures

Next One: Qinggang Wang, Long Zheng*, Jingrui Yuan, Yu Huang, Pengcheng Yao, Chuangyi Gui, Ao Hu, Xiaofei Liao, and Hai Jin, Hardware-accelerated hypergraph processing with chain-driven scheduling