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1.6Tb/s (8×4)×(8×4)高速并行处理芯片间XXXX系统研究
Release time:2021-05-26  Hits:

Leading Scientist: LUO FENG GUANG

Supported by: Other departments of the State Council of the People's Republic of China

Date of Project Approval: 2020-01-01

Date of Project Completion: 2020-12-30