Indexed by: Journal paper

First Author: 冯择阳,王校杰

Correspondence Author: TONG HAO

Co-author: 缪向水,蔡经纬

Journal: Science China Information Sciences

Affiliation of Author(s): 华中科技大学

Discipline: Engineering

First-Level Discipline: Electronic Science And Technology

Document Type: J

Volume: 66

Issue: 8

Page Number: 182401

Key Words: high-density memory ferroelectric field-effect transistors two-dimensional ferroelectrics van der Waals In2Se3

DOI number: 10.1007/s11432-022-3617-2

Date of Publication: 4511-01-01

Abstract: High-density integration of ferroelectric field-effect transistors (FeFETs) is hindered by factors such as interfacial states, short-channel effects, and ferroelectricity degradation in ultrathin films. Accordingly, the introduction of two-dimensional (2D) materials could effectively solve these problems. However, most current studies focus on the replacement of Si-based channels with 2D channels. Little progress has been made in addressing issues caused by bulk-phase ferroelectric gate layers, such as the unavoidable rough interfaces and the fading of ferroelectricity in ultrathin films. Herein, the 2D ferroelectric material In2Se3 is introduced as the gate dielectric. Combined with 2D insulating h-BN and 2D channel MoS2, an all-van der Waals (vdW) stacking FeFET is fabricated to provide a straight solution for the abovementioned issues. First, the robust ferroelectric phase of In2 Se3 is verified in an ultrathin film case and a high-temperature case, which is outstanding among recently reported 2D ferroelectrics. Second, device-level out-of-plane ferroelectric polarization switching is achieved in the cross-structure device. Based on these results, In2 Se3 is adopted as the ferroelectric gate dielectric to fabricate all-vdW stacking FeFETs. The subsequent transistor performance measurement on the fabricated FeFETs indicates that the ferroelectric polarization of the In2 Se3 layer plays a dominating role in forming a counterclockwise hysteresis loop. Further pulse response measurements manifest the feasibility of nonvolatile channel conductance tuning of these devices with a proper pulse design. Our findings suggest that In2Se3 is a suitable 2D ferroelectric gate material and that all-vdW stacking FeFETs based on 2D ferroelectrics are promising in the application of high-density memory.

Links to published journals: https://www.researchgate.net/publication/372498367_All-van_der_Waals_stacking_ferroelectric_field-effect_transistor_based_on_In2Se3_for_high-density_memory