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A High-Linearity, Energy-Efficient Switched-Capacitor Computing Circuit for Edge Applications
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第一作者：Wenming Zhu
通讯作者：C. Wang*
合写作者：Huixuan Yin, Y. Zhao, G. Yu, Y. Yang, and
发表刊物：IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA 2023)
收录刊物：EI
学科门类：工学
一级学科：电子科学与技术
文献类型：C
DOI码：10.1109/ICTA60488.2023.10364264
发表时间：2023-09-06
摘要：This paper presents a passive switched-capacitor multiplication circuit for deep neural network computing in edge applications. A novel capacitor switching scheme is proposed to eliminate the computation error caused by non-binary-weighted parasitic capacitance, and dramatically increase the computing accuracy. It also simplifies the switching sequences to five phases to reduce the computation latency and improve the energy efficiency. Additionally, a mixed-signal multiply-add computing array is built with nine proposed switched-capacitor circuits and a SAR ADC. The simulation results in 28-nm technology show that the proposed array can achieve an energy efficiency of 11.94 TOPS/W and an average absolute computation error of 0.25 LSB, resulting in a classification accuracy of 98.43% when used for a 3-layer neural network on the MNIST dataset. As compared to the state-of-art mixed-signal computing circuit, the proposed circuit can enhance 1.19× energy efficiency and reduce 74% average absolute computation error.