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超低功耗集成电路设计
新型人工智能处理器设计
光电融合智能传感集成电路设计
基于新型技术的集成电路设计
面向智能机器人/自动驾驶、智能传感器/物联网/生物医学/医疗健康等新兴应用集成电路设计
- Z. Shen, J. Xiao,,Z. Wei, B. Dong, Y. Tan, Z. Wu, Y. Zheng, and.C. Wang*.MT-REN: An Energy-Efficient Metric-Topology-Fusion Reconfigurable End-to-End GVD-NeuroSLAM Accelerator for Autonomous Micro Robots.[J].IEEE Trans. on Very Large Scale Integration Systems (TVLSI) 2026,
- Z. He, Z. Shen,, N. A. Kyaw, Y. Zhao, S. Sheng, K. S. Chong, B. H. Gwee, and.C. Wang*.An Energy-Efficient, SCA-Resilient AES Encryption Accelerator Design with Dual-Rail SRAM LIM Macro for Edge Devices.[C].2026 IEEE International Symposium on Artificial Intelligence Circuits and Systems (AICAS 2026),
- Y. Chen, W. Zhang,, Z. Shen, Y. Long, M. Ye,.Y. Yu, and C. Wang*.Optical Integrated Sensing and Communication Lidar Based on RBPSK-FMCW Joint Waveform and Optical Phased Array.[J].IEEE Journal of Lightwave Technology (JLT),
- Zixuan Shen,C. Wang.GALSNP: A 40nm 1.01pJ/SOP GALS Neuromorphic Processor with Hybrid ANN-SNN and Global-gradient-free On-chip Learning Mechanism.IEEE International Solid-State Circuits Conference (ISSCC) 2026 SRP,
- X. Zhang, Y. Zhao,, G. Yu,.Z. Lu, and C. Wang*.A Low-Noise, Low-Power, and Wide-Bandwidth Regulated Cascode Transimpedance Amplifier with Cascode-Feedback in 40 nm CMOS.[J].Sensors,2026,(2):
- B. Liu,, J. Wang, Y. Zhao, M. Bao, Z. Fan, D. Jiang, Z. Shen, Z. He, D. Xu, and L. Sun.K. Wang*, Chao Wang*,.An Energy-efficient, High-frame-rate, and Reconfigurable EKF-SLAM Processor with Full Acceleration for Autonomous Mobile Robots.[J].IEEE Trans. on Circuits and Systems-I Regular Papers (TCAS-I),2025,(11):6724-6737
- Mixed-Signal Operational Circuit.发明,US 12,556,179 B2,2024/05/06
- Memristor-Based In-memory Logic Circuit and In-Memory Logic Computation System, and Applications.US 12,444,456 B2,2023/06/29
- Hardware Acceleration Method and System Based on Scale-Invariant Feature Transform Algorithm.发明,US 12,175,724 B2,2022/08/01
- Reconfigurable Hardware Acceleration Method and System for Gaussian Pyramid Construction.发明,US 11,830,114 B2,2022/04/28
- 一种基于DAC阵列的混合信号运算电路.发明,2024/01/24
- 一种基于转置 DRAM 单元的存内计算电路和装置.发明,CN 116483773 B,2023/04/07
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