研究方向
类脑计算与器件
研究组近期主要工作发表:
1. “Reconfigurable Synaptic and Neuronal Functions in a V/VOx/HfWOx/Pt Memristor for Nonpolar Spiking Convolutional Neural Network”, Advanced Functional Materials, 2022 DOI: 10.1002/adfm.202111996 (影响因子:15) (与李祎老师课题组合作完成)
2. “Reconfigurable two-WSe2-transistor synaptic cell for reinforcement learning”, Advanced Materials, 2022 DOI: 10.1002/adma.202107754 (影响因子:30)(与香港理工大学柴扬老师课题组合作完成)
3. “Forming-free and Annealing-free V/VOx/HfWOx/Pt Device Exhibiting Reconfigurable Threshold and Resistive switching with high speed (10^12/>10^10)”, 2021 IEEE International Electron Devices Meeting (IEDM, 微电子领域国际顶会), 2021 (与李祎老师课题组合作完成)(华中科技大学微电子系史上第二篇)
4. “Solid-state nanopore systems: From materials to applications”, NPG Asia Materials, vol 13, pp 48, 2021 (影响因子:9)
5. “Complementary Memtransistors based Multilayer Neural Networks for Online Supervised Learning through (anti-) Spiking-Timing Dependent Plasticity”, IEEE Transactions on Neural Networks & Learning Systems, 2021 (影响因子:12)
6. “Threshold Switching Memristor-based Stochastic Neuron for Probabilistic Computing”, Materials Horizons (影响因子:12), 2021 (与童浩老师研究组合作完成)
7. “Nanochannel-based Interfacial Memristor: Electrokinetic Analysis of the Frequency Characteristic”, Advanced Electronic Materials, 2021
8. “Enhancing LiAlOx synaptic performance by reducing Schottky barrier height for deep neural network application”, Nanoscale (封面文章), 2020
9. “Graphene-ferroelectric transistors as complementary synapses for supervised learning in spiking neural network”, NPJ 2D Materials & Applications (影响因子:11), 2019
10. “Complementary Graphene-Ferroelectric Transistors (C-GFTs) as Synapses with Modulatable Plasticity for Supervised Learning”, 2019 IEEE International Electron Devices Meeting (IEDM, 微电子领域国际顶会)(华中科技大学微电子系史上第一篇)
11. “Nanochannel-Based Transport in an Interfacial Memristor Can Emulate the Analog Weight Modulation of Synapses”, Nano Letters, 2019
12. “Optimal Tuning of Memristor Conductance Variation in Spiking Neural Networks for Online Unsupervised Learning”, IEEE Transaction Electron Devices, 2019
13. “Alleviating Conductance Nonlinearity via Pulse Shape Designs in TaOx Memristive Synapses”, IEEE Transaction Electron Devices, 2019