Indexed by: Journal paper

First Author: 赵锐哲

Correspondence Author: TONG HAO

Co-author: 缪向水,程晓敏,chenziqi,WANG LUN,何明泽

Journal: Science China Materials

Affiliation of Author(s): 华中科技大学

Discipline: Engineering

First-Level Discipline: Electronic Science And Technology

Document Type: J

Key Words: multilevel cell, high aspect ratio, nanowires, 3D phase-change memory, Ge2Sb2Te5

DOI number: 10.1007/s40843-022-2028-7

Date of Publication: 4466-06-01

Abstract: Further improvement of storage density is a key challenge for the application of phase-change memory (PCM) in storage-class memory. However, for PCM, storage density improvements include feature size scaling down and multilevel cell (MLC) operation, potentially causing thermal crosstalk issues and phase separation issues, respectively. To address these challenges, we propose a high-aspect-ratio (25:1) lateral nanowire (NW) PCM device with conventional chalcogenide Ge2Sb2Te5 (GST-225) to realize stable MLC operations, i.e., low intra- and inter-cell variability and low resistance drift (coefficient = 0.009). The improved MLC performance is attributed to the high aspect ratio, which enables precise control of the amorphous region because of sidewall confinement, as confirmed by transmission electron microscopy analysis. In summary, the NW devices provide guidance for the design of future high-aspect-ratio threedimensional PCM devices with MLC capability.

Links to published journals: https://link.springer.com/article/10.1007/s40843-022-2028-7#author-information