Indexed by: Journal paper

First Author: 周凌珺

Correspondence Author: 缪向水,TONG HAO

Co-author: 程晓敏,徐明,钱航,王校杰,yangzhe,周凌珺

Journal: Advanced Electronic Materials

Affiliation of Author(s): 华中科技大学

Discipline: Engineering

First-Level Discipline: 电子科学技术

Document Type: J

Volume: 6

Issue: 1

DOI number: 10.1002/aelm.201900781

Date of Publication: 4378-02-01

Abstract: Resistance drift is one of the key challenges in phase‐change memory, especially in multilevel storage applications. Although many efforts have been proposed to reduce the probability error caused by resistance drift, the most effective method to suppress resistance drift is by material design. Since resistance drift in amorphous materials comes from changes in the distributions of defects and tail states that are caused by spontaneous structural relaxation, it is possible to suppress resistance drift by confine defect relaxation. A superlattice‐like structure is used to construct relatively controllable interfaces different from those inherent in amorphous chalcogenide for the regulation of resistance drift. By adjusting structural parameters, amorphous GeTe/Sb2Te3 achieves a very low resistance drift. A low‐field electrical transport test based on a trapping band model shows that a change in the structural parameters directly affects the transport process in GeTe/Sb2Te3 such that the resistance drift is suppressed. X‐ray photoelectron spectroscopy characterization reveals that defects at interfaces in superlattice‐like GeTe/Sb2Te3 vary with the structural parameters. Compared with traditional doping and other methods, the interfacial structure introduces controllable defects and provides another strategy for the design of multilevel data storage.

Links to published journals: https://onlinelibrary.wiley.com/doi/abs/10.1002/aelm.201900781