童浩

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Personal information

教授     博士生导师    

所在单位:集成电路学院

学历:研究生(博士)毕业

学位:博士学位

毕业院校:华中科技大学

学科:微电子学与固体电子学
曾获荣誉:
2024    华中科技大学青年五四奖章
2022    华为奥林帕斯先锋奖
2020    湖北省技术发明一等奖(排名第2)
2013    湖北省年度“十大科技事件”
2013    湖北省优秀博士学位论文
2014    湖北省优秀学士学位论文指导教师
2015    华中科技大学教师教学竞赛二等奖
2017    华中科技大学光学与电子信息学院“我最喜爱的教师班主任“
2020    华中科技大学光学与电子信息学院突出贡献一等奖

All-van der Waals stacking ferroelectric field-effect transistor based on In2Se3 for high-density memory
发布时间:2023-08-21  点击次数:

论文类型:期刊论文
第一作者:冯择阳,王校杰
通讯作者:童浩
合写作者:缪向水,蔡经纬
发表刊物:Science China Information Sciences
所属单位:华中科技大学
学科门类:工学
一级学科:电子科学与技术
文献类型:J
卷号:66
期号:8
页面范围:182401
关键字:high-density memory ferroelectric field-effect transistors two-dimensional ferroelectrics van der Waals In2Se3
DOI码:10.1007/s11432-022-3617-2
发表时间:4511-01-01
摘要:High-density integration of ferroelectric field-effect transistors (FeFETs) is hindered by factors such as interfacial states, short-channel effects, and ferroelectricity degradation in ultrathin films. Accordingly, the introduction of two-dimensional (2D) materials could effectively solve these problems. However, most current studies focus on the replacement of Si-based channels with 2D channels. Little progress has been made in addressing issues caused by bulk-phase ferroelectric gate layers, such as the unavoidable rough interfaces and the fading of ferroelectricity in ultrathin films. Herein, the 2D ferroelectric material In2Se3 is introduced as the gate dielectric. Combined with 2D insulating h-BN and 2D channel MoS2, an all-van der Waals (vdW) stacking FeFET is fabricated to provide a straight solution for the abovementioned issues. First, the robust ferroelectric phase of In2 Se3 is verified in an ultrathin film case and a high-temperature case, which is outstanding among recently reported 2D ferroelectrics. Second, device-level out-of-plane ferroelectric polarization switching is achieved in the cross-structure device. Based on these results, In2 Se3 is adopted as the ferroelectric gate dielectric to fabricate all-vdW stacking FeFETs. The subsequent transistor performance measurement on the fabricated FeFETs indicates that the ferroelectric polarization of the In2 Se3 layer plays a dominating role in forming a counterclockwise hysteresis loop. Further pulse response measurements manifest the feasibility of nonvolatile channel conductance tuning of these devices with a proper pulse design. Our findings suggest that In2Se3 is a suitable 2D ferroelectric gate material and that all-vdW stacking FeFETs based on 2D ferroelectrics are promising in the application of high-density memory.
发布期刊链接:https://www.researchgate.net/publication/372498367_All-van_der_Waals_stacking_ferroelectric_field-effect_transistor_based_on_In2Se3_for_high-density_memory