Indexed by: Journal paper

First Author: Menghua Huang,Pinfeng Jiang

Correspondence Author: Xingsheng Wang

Co-author: Chengxu Wang,Meiqing Wang,Yinghao Ma,Zhouchao Gan,Yifan Yang,Xiangshui Miao

Journal: IEEE Transactions on Electron Devices

Included Journals: SCI、EI

Volume: 71

Issue: 8

Page Number: 4613-4618

Key Words: Analogy memristor, back-end-of-line (BEOL) integration, CMOS, one transistor one memristor (1T1M), synaptic device, temperature

DOI number: 10.1109/TED.2024.3406310

Date of Publication: 2024-06-12

Abstract: The memristor is a promising candidate for multilevel memory and neuromorphic computing. This study successfully integrated HfO x /AlO y superlattice-like (SLL) memristors in the 0.18/0.5 μ m CMOS back-end-of-line (BEOL) process and statistically analyzed their performance. We identified that BEOL annealing (400 ∘ C/30 min) can cause oxygen diffusion and short-circuiting, but reducing Ti electrode thickness mitigates this issue. Furthermore, low post-forming resistance is discussed and solved by one transistor one memristor (1T1M) structure. Finally, we fabricate a 1T1M crossbar array with a size of 1 Kb in the 0.18 μ m CMOS process. We demonstrated the multilevel characteristics and endurance of 1T1M. Furthermore, the stable and precise multilevel conductance programming of memristors is achieved by a specific writing method and we simulated the effect of conductance of failure bits on classification accuracy in a four-layer MLP network on the MNIST dataset.

Links to published journals: https://ieeexplore.ieee.org/document/10555550