Indexed by: Journal paper

First Author: Zhouchao Gan

Correspondence Author: Xingsheng Wang

Co-author: Chenyu Zhang,Dongdong Zhang,Yinghao Ma,Menghua Huang,Xiangshui Miao

Journal: IEEE Transactions on Electron Devices

Included Journals: SCI、EI

Volume: 72

Issue: 3

Page Number: 1118-1124

Key Words: Full-adder (FA) functions, logic-in-memory(LIM), memristor, multiplexer (MUX), V/R-R, XOR.

DOI number: 10.1109/TED.2025.3532581

Date of Publication: 2025-02-04

Impact Factor: 3.2

Abstract: Logic-in-memory (LIM) computing is expected to break the von Neumann bottleneck by performing logical operations in memory. This article presents a novel 2–1 multiplexer (MUX) scheme based on memristors that requires only two steps and three memristors. The proposed MUX logic can be executed natively in a memristor array, facilitating the construction of complex logic and arithmetic functions. Employing the proposed 2–1 MUX logic combined with XOR logic, the 1-bit full-adder (FA) function is efficiently implemented and experimentally verified. The area and delay overheads of both serial and parallel architectures of n-bit FAs are derived, and the FA function is experimentally verified through a 4-bit carry-select adder case. Compared with IMPLY logic, the proposed FA scheme shows a significant performance improvement without sacrificing power consumption. The experimental results demonstrate the efficiency of the proposed MUX logic in accelerating FA functions, paving the way for building efficient LIM systems.

Links to published journals: https://ieeexplore.ieee.org/document/10870277