王超

个人信息Personal Information

研究员(自然科学)   博士生导师   硕士生导师  

性别:男

在职信息:在职

所在单位:光学与电子信息学院

学历:研究生(博士)毕业

学位:工学博士学位

毕业院校:南洋理工大学

学科:微电子学与固体电子学
电路与系统

论文成果

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Efficient Hardware Accelerator Design of Non-linear Optimization Correlative Scan Matching Algorithm in 2D LiDAR SLAM for Mobile Robots

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论文类型:期刊论文

第一作者:A. Hu

通讯作者:G. Yu

合写作者:Q. Wang, D. Han, S. Zhao, B. Liu, Y. Yu, Y. Li, C. Wang,and X. Zou,

发表刊物:Sensors

收录刊物:SCI

学科门类:工学

一级学科:电子科学与技术

文献类型:J

卷号:22

期号:8947

DOI码:10.3390/s22228947

发表时间:2022-11-18

影响因子:3.847

摘要:Simultaneous localization and mapping (SLAM) is the major solution for constructing or updating a map of an unknown environment while simultaneously keeping track of a mobile robot’s location. Correlative Scan Matching (CSM) is a scan matching algorithm for obtaining the posterior distribution probability for the robot’s pose in SLAM. This paper combines the non-linear optimization algorithm and CSM algorithm into an NLO-CSM (Non-linear Optimization CSM) algorithm for reducing the computation resources and the amount of computation while ensuring high calculation accuracy, and it presents an efficient hardware accelerator design of the NLO-CSM algorithm for the scan matching in 2D LiDAR SLAM. The proposed NLO-CSM hardware accelerator utilizes pipeline processing and module reusing techniques to achieve low hardware overhead, fast matching, and high energy efficiency. FPGA implementation results show that, at 100 MHz clock, the power consumption of the proposed hardware accelerator is as low as 0.79 W, while it performs a scan match at 8.98 ms and 7.15 mJ per frame. The proposed design outperforms the ARM-A9 dual-core CPU implementation with a 92.74% increase and 90.71% saving in computing speed and energy consumption, respectively. It has also achieved 80.3% LUTs, 84.13% FFs, and 20.83% DSPs saving, as well as an 8.17× increase in frame rate and 96.22% improvement in energy efficiency over a state-of-the-art hardware accelerator design in the literature. ASIC implementation in 65 nm can further reduce the computing time and energy consumption per scan to 5.94 ms and 0.06 mJ, respectively, which shows that the proposed NLO-CSM hardware accelerator design is suitable for resource-limited and energy-constrained mobile and micro robot applications.

发布期刊链接:https://www.mdpi.com/1424-8220/22/22/8947