研究员(自然科学)
Supervisor of Doctorate Candidates
Supervisor of Master's Candidates
Gender:Male
Status:Employed
Department:School of Optical and Electronic Information
Education Level:Postgraduate (Doctoral)
Degree:Doctoral Degree in Engineering
Discipline:Microelectronics and Solid-state Electronics
Electrical Circuit and System
A High-Accuracy and Energy-Efficient CORDIC based Izhikevich Neuron with Error Suppression and Compensation
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Indexed by:Journal paper
First Author:Z. Peng,J. Wang
Correspondence Author:C. Wang*
Co-author:Y. Li, Y. Zhan, G. Yu, K. Chong
Journal:IEEE Trans. on Biomedical Circuits and Systems (TBioCAS)
Included Journals:SCI
Discipline:Engineering
Document Type:J
Volume:16
Issue:10
Page Number:807 - 821
DOI number:10.1109/TBCAS.2022.3191004
Date of Publication:2022-07-07
Impact Factor:5.23
Abstract:Bio-inspired neuron models are the key building blocks of brain-like neural networks for brain-science exploration and neuromorphic engineering applications. The efficient hardware design of bio-inspired neuron models is one of the challenges to implement brain-like neural networks, as the balancing of model accuracy, energy consumption and hardware cost is very challenging. This paper proposes a high-accuracy and energy-efficient Fast-Convergence COordinate Rotation DIgital Computer (FC-CORDIC) based Izhikevich neuron design. For ensuring the model accuracy, an error propagation model of the Izhikevich neuron is presented for systematic error analysis and effective error reduction. Parameter-Tuning Error Compensation (PTEC) method and Bitwidth-Extension Error Suppression (BEES) method are proposed to reduce the error of Izhikevich neuron design effectively. In addition, by utilizing the FC-CORDIC instead of conventional CORDIC for square calculation in the Izhikevich model, the redundant CORDIC iterations are removed and therefore, both the accumulated errors and required computation are effectively reduced, which significantly improve the accuracy and energy efficiency. An optimized fixed-point design of FC-CORDIC is also proposed to save hardware overhead while ensuring the accuracy. FPGA implementation results exhibit that the proposed Izhikevich neuron design can achieve high accuracy and energy efficiency with an acceptable hardware overhead, among the state-of-the-art designs.
Links to published journals:https://ieeexplore.ieee.org/document/9830060
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