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第一作者：张晨宇,马颖昊

通讯作者：王兴晟

合写作者：宋玉洁,阳帆,王毅,吴绮雯,缪向水

发表刊物：IEEE Transactions on Electron Devices

收录刊物：SCI、EI

卷号：70

期号：12

页面范围：6341-6346

关键字：Logic-in-memory, memristor, multiplexer, V/R-R

DOI码：10.1109/TED.2023.3327985

发表时间：2023-11-04

摘要：Instead of the von Neumann architecture, logic-in-memory (LIM) provides a revolutionary approach to promoting computing efficiency. Based on the earlier work of complete LIM 16 Boolean logics, this paper describes a memristor-based multiplexer (MUX) efficiently realized using a V/R-R logic method, despite the fact that MUX is one of complicated logics in the design of VLSI circuits. Following that, a unique 2-1 MUX is further created by merging destructive R-R logic with V/R-R logic, resulting in further device reduction. 2-1 MUX only requires 3~4 memristors and 4 steps. Furthermore, the technique can be implemented for a 4-1 MUX using 7 memristors and 10 steps. Tests and simulations validated their feasibility and correctness. The effect of resistor due to the flip voltage variation on the computation accuracy is further analyzed, and the cascaded serial scheme of the MUX is finally presented.

发布期刊链接：https://ieeexplore.ieee.org/document/10305595